“Designing a DC/DC converter that draws only microamps of current at no-load can be compared to a muscle car fueled by a lighter liquid – you can get it to work, but it won’t be easy. High efficiency at full load current is common in most modern DC/DC converters; however, achieving high efficiency when the load is disabled or disconnected remains a difficult and/or expensive task.
Designing a DC/DC converter that draws only microamps of current at no-load can be compared to a muscle car fueled by a lighter liquid – you can get it to work, but it won’t be easy. High efficiency at full load current is common in most modern DC/DC converters; however, achieving high efficiency when the load is disabled or disconnected remains a difficult and/or expensive task.
Many automotive and industrial applications require efficient 12 V or 24 V step-down power conversion from mains to mains. point-of-load (POL) voltage at full load, but also requires very low current consumption when the device is idle or off. To achieve such low currents, you can easily use a low dropout regulator (LDO) in parallel with a buck converter to achieve minimal current draw from the battery when the system goes into light/no-load conditions.
Ultimately, the ideal situation for extending system battery life is to disable all possible devices from the input power source. However, in some cases some components within the system still require a sub-regulated voltage to communicate with other system modules during shutdown states (i.e. CAN bus transceivers in automotive applications). DC/DC converters not specifically designed for light load efficiency can draw a few milliamps with no load. Additionally, converters with high light-load efficiency will employ frequency foldback schemes and discontinuous mode operation, resulting in noisy output voltages and excessive EMI emissions. LDOs are ideal for light load situations because they can be designed to consume very low current while maintaining a low noise output voltage. The no-load current (also called “ground current”) into the input can be on the order of a few microamps or less. Therefore, there are clear advantages to combining the performance of the converter and the LDO.
If the designer is able to disable the DC/DC converter when the load is a load, there is a simple way of using the two in parallel. Minimum, i.e. use the same enable/disable signal for the converter used for the load. An example can be seen in Figure 1.
Figure 1: Block diagram of a DC/DC converter in parallel with an LDO (courtesy of Texas Instruments)
Figure 2 gives a general example of a low IQ LDO efficiency curve plotted with the efficiency curve of a DC/DC converter for higher voltage conversion (i.e. 12 V to 1 V). At light loads, LDOs are more efficient. If the system spends a lot of time at light loads, using an LDO to regulate the voltage can significantly improve the overall system efficiency.
Figure 2: Generic example of a low IQ efficiency curve (courtesy of Texas Instruments).
Implementing the circuit in Figure 1 requires setting the converter output to a voltage higher than the maximum LDO output voltage. In normal operation, when the converter is enabled, the converter will regulate the output voltage and supply current to the load. Most LDOs cannot sink current and rely on the load current from the device to regulate the output. Pulling the LDO’s output voltage above its nominal voltage will force the LDO into an unregulated state where current will not flow from the input to the output and the DC/DC converter will effectively operate as if the LDO was not connected.
Once the DC/DC converter is disabled, it will stop switching and the output voltage will drop until the LDO starts to regulate output. When enabled again, the DC/DC converter will start up in a pre-biased state (the positive voltage present on the output during start-up is called “pre-bias”). The converter will begin its startup process without drawing any current from the circuit. The output node eventually pulls the output voltage above the nominal LDO voltage and re-controls the output.
Consider a simple battery shelf life example using a 1400 mAh battery. Assume the device is in standby after the battery is fully charged and the connected power source is an LDO with 10µA quiescent current at no load or a DC/DC converter with 200µA quiescent current at no load.
Battery shelf life with DC/DC converter (full initial charge) Battery shelf life with LDO (full initial charge)
1400/0.2 = 7000 hours
7000/24 = 291.7 days
1400/0.01 = 140000 hours
140000/24 = 5833.3 days
Battery life can be extended 20 times.
The discussion will now turn to how to implement this circuit using TI devices.
The circuit in Figure 3 shows an example converter with an LDO in parallel with DC/DC for an efficiency boost.
Figure 3: TPS709 in parallel with TPS54331 (Courtesy of Texas Instruments).
The LDO of choice is the TPS709, which has a 30 V input range and a nominal ground current of only 1µA. The DC/DC converter is the TPS54331, selected for its input voltage range and high efficiency. Compared to most similar DC/DC converters, the TPS54331 already exhibits high efficiency at light loads. However, at 110µA (typ) non-switching quiescent current, the no-load current of the converter is almost 100 times the ground current of the TPS709 at no-load (1.3µA), even before switching losses and feedback resistive loads as shown in Figure 4 shows the difference in efficiency measurements between TPS709 and TPS54331. Figure 4 shows the difference in efficiency measurements between TPS709 and TPS54331. The measurement is configured for VIN = 12 V, VOUT = 3.46 V when the TPS54331 is enabled, and VOUT = 3.3 V when the TPS54331 is disabled.
Figure 4: Achieving the efficiency of the circuit, enabling and disabling the TPS54331 (Courtesy of Texas Instruments).
As much as possible please note that the efficiency of the TPS709 will remain roughly constant at 27% (VOUT/VIN) from a 10µA load current to 10 mA. When the TPS54331 is enabled, it will start up with very low efficiency due to the no-load input current, but will ramp up quickly, reaching over 90% at higher load currents. When the TPS54331 is enabled, the TPS709 does not supply any load current, so its ground current can be ignored. From this it is clear that disabling the TPS54331 would be beneficial when the output load current is 350µA or less.
If the load circuit has a high current slew rate when enabled, it may be necessary to delay the enable circuit to the load so that the DC/DC converter has enough time to be enabled before the load requires current from VOUT. This can easily be done with an RC delay, however, care should be taken that the load will not remain on after the DC/DC is turned off. A diode in parallel with a resistor accomplishes this. Figure 5 shows an example of this circuit.
How to Use a Low Dropout Regulator to Improve the Light Load Efficiency of a Buck Converter Figure 5: TPS709 in parallel with TPS54331 with load enable delay (Courtesy of Texas Instruments).
Figure 6 shows a system response time range shot of the system, along with the enable signal to bring the circuit into a 1 A load.
How to use a low-dropout regulator to improve the light-load efficiency of a buck converter Figure 6: Enable and enable/disable the circuit in Figure 3.
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